资源列表
8255
- Verilog语言描述的Intel8255 IP Core，本人已经在某项目中经过了物理验证的，可直接用于FPGA综合或ASIC综合。
verilog_rs232_rx_tx
- fpga中verilog实现的rs232串口收发逻辑，基础入门，参考学习串口收发-FPGA in Verilog implementation RS232 serial port transceiver logic, based on entry, refer to the study serial transceiver
FPGA-VIDEO
- FPGA图像采集程序，cmos图像采集、I2C控制、VGA图像像是模块-FPGA VIDEO
35_486_bus
- 请注意： 本例的源描述包含文件类型，在学习版上不能编译及模拟， 如果您需要对此描述进行编译及模拟，请与北京理工大学 ASIC研究所联系。 另外，此例与第75例是同一个电路的不同部分的描述，可以 一起参考这两个例子的描述。-Please note : The cases include the descr iption of the source file type, version of the study can not be compiled and simulation, if
NewFolder
- these are the codes written in verilog which are for a dual elevator design
4bit_moore
- Moore machine is state machine whose output is a function of only the current state.
IO地址2
- DFBTRBTFB DSGSERBDFB(EFEDBFBTNGHNFNBRBBFDNHGNFB)
i2c_core
- i2c协议,基于FPGA开发的i2c协议，并在平台上验证过，好用(i2c bus,base on FPGA, and verification at the platform,it is right)
Verilog-VGA-game-master
- 打砖块游戏的verilog代码编写与仿真文件(Verilog code writing and simulation files for brick-blocking games)
8b10b-master
- 8B/10Bencode and decoder
code
- 基于蜂鸟E203riscv系统的DMA外设代码(DMA code based on hbird_e203 system)
test_ddr3
- 基于XILINX K7系列FPGA实现5120*5120分辨率20帧的DDR3读写，发送到海思3559,HDMI显示。(Based on Xilinx K7 series FPGA to achieve 5120*5120 resolution of 20 frames of DDR3 read and write, sent to the Hays 3559,HDMI display.)