资源列表
8bitsine
- 8bit采样sine波形发生器,一共两个文件，各自用VHDL和VERILOG编写，通信开发平台专用-8bit sampling sine wave generator, a total of two papers, each with VHDL and VERILOG preparation, communications development platform dedicated
QAM161
- 一个QAM16调制方式的verilog设计，包括4个verilog源代码，能够构成一个完整的QAM调制器-A QAM16 modulationVerilog design , including four verilog source code, which can form a complete QAM modulator
md5
- md5算法的vhdl实现，并配有测试用例，并没有使用任何xilinx的library，用modelsim se进行仿真-md5 algorithm based on fpga in vhdl
DE2LCD_(VHDL)
- DE2控制LCD显示(VHDL编写对LCD的控制)-DE2 LCD
twice_clk
- 对输入时钟进行2倍频 已在modelsim中通过仿真 建议进行后仿 应用上来看 是可以使用的-the function of the module is frequency multiplication，and the module had been test and verified by modelsim,so the products can be employed with 100 ease by each consumer.think you!!!!
mid_filter
- 中值滤波的实现，用于图像的预处理。取出图像噪声-Implementation of median filter for image preprocessing. Remove image noise
dianziqin
- 一个关于HDL的电子琴设计，完整源程序，编译通过，运行正常-A keyboard on the HDL design, complete source code, compile and run properly
VHDL
- 基于VHDL的分频器,程序源代码中完成对时钟信号CLK的2分频，4分频，8分频，16分频。-The frequency of an points based on VHDL program
ad7823_interface
- AD7823 A/D CONVERTER INTERFACE
VHDL_LCD1602
- 用FPGA来实现液晶LCD1602的读写显示操作的程序代码。-Using FPGA to implement reading and writing LCD1602 LCD display operation code.
ongame
- 一个游戏 the hardware for the game includes a number of displays, each with a button and -- a light, that each represent a bin that can store marbles (beans). -- -- The display indicates the number of marbles in each bin at any given time. --
ALU
- ALU，两种类型的verilog源代码，包括测试代码，原创。-ALU, two types of verilog source code, including test code, originality.