资源列表
fifo-verilog
- 自己设计的一种FIFO寄存器，用verilog 编写，QUARTUS II下验证-Own design of a FIFO register, with verilog preparation, QUARTUS II certification under
chengfaqi
- 16位的原码两位乘法器，实现原码两位乘，经试验可以使用-16 of the original code two multiplier, two implementation source code
pinlvji
- 测频控制信号发生器设计，防止可能产生的毛刺。这是老师给的实验程序，共享一下！-Design of frequency control signal generator, to prevent possible glitches. This is the teacher to the experimental procedures, share what!
ALU_VHDL_code
- ALU逻辑运算单元计算器的VHDL源代码，已通过FGPA验证，绝对正确。-ALU ALU calculator VHDL source code has been verified by FGPA absolutely correct.
3or5-devided-frequency
- 用verilog实现5分频或者3分频,简单实用-implement the devided five frequency
alaw
- 使用VHDL实现通信脉冲编码调制（PCM）中的a律转换，并实现串并、并串转换。-Use VHDL to achieve communication pulse code modulation (PCM) of a law conversion, and to achieve and string, and string conversion.
wishbone_i2c_master
- 本帖最后由 NovaCao 于 1-18-2009 18:02 编辑 使用Quartus II进行仿真 QQ：44425312 QQ群：50585234（群名称：FPGA4u） gtalk：fpgaforu@gmail.com 网站：www.fpga4u.com 淘宝网店：http://shop34914329.taobao.com/ 我们以一个计
vhdl
- 基于FPGA的PCM编码源代码,快来参考啊-PCM code based on FPGA
DE2_TOP_ps2_mouse
- ps2_mouse实现的源代码，在Altera的DE2板上实现-ps2_mouse the source code, implementation in Altera' s DE2 board
lcd_test
- NIOS II IDE 编程， LCD测试程序，仅供参考。-NIOS II programming IDE, LCD testing procedures, for information purposes only.
OFDM
- IMPLEMENTATION OF OFDM TRANSMITTER AND RECEIVER
ofdm
- OFDM VHDL SOURCE CODE