资源列表
jiaotongdengmokuai
- 基于FPGA的交通灯控制器，语言是VHDL-Traffic signal controller based on FPGA, VHDL language
RS_C
- 基于C的RS编译码，谢谢批评指正，一起学习。-C-based RS codec, thank criticism and learn together.
sasc_latest.tar
- rs232 verilog port from opencores.org
quartus
- 通过使用4位全加器和4位比较器以及相关组合逻辑的使用并结合BCD码加法规则构成4位BCD码加法器。-Through the use of four full adder and 4-bit comparator and associated logic of the use and combination with BCD adder rules constitute four BCD adder.
2014-4-23
- 正弦信号发生器，rom78需要自己设置。请参考其他资料-Sinusoidal signal generator
verilog_-key_board-scan
- 能够将4×4键盘上的数字0_9显示到LED数码管，按下4×4键盘上的一个数字0_9键时， LED数码管上能够显示对应按键数字-Can be 4 × 4 keypad numbers 0_9 display to LED, press the 4 × 4 on the keyboard when a key figure 0_9, LED digital tube can be displayed on the corresponding number key
verilog-hdl
- verilog hdl quartues-硬件描述语言， 数字系统设计，设计数字系统，灵活方便，更改方便，设计流程时间段
70V631_VHDL_Model.zip
- 针对IDT公司71v631的fpga设计，VHDL语言模型。
sine_testbench
- Sine generator in VHDL.
ps2interface
- this a fpga sparttan 3e based project in which i have made a game based on vga interface . this file is the supporting file for ps/2 interface .-this is a fpga sparttan 3e based project in which i have made a game based on vga interface . t
OFDMcontents
- orthogonal frequency division multiple acce-orthogonal frequency division multiple access
basketball-counter
- 篮球机分区，显示两个队的得分分为两个方向积分，每次加1或者减1-basketball counter