资源列表
gen_itu
- ITU645视频格式输出,速率可调节.多种格式可调整.
good-ALV
- abap alv,一个很好的alv整理教程-abap alv
i211_001
- Dallas 1-Wire ip 非常有用,不占用CPU的时间.
AVR-FPGA
- 电子计数式简易多功能计数器的原理、设计、应用及误差特性。本计数器以ATmega128单片机为控制核心,由FPGA模块、键盘输入模块、液晶显示模块、温度测量模块等功能模块组成,实现了周期、频率、时间间隔的测量等功能。-Achieve multi-counter, you would like to have more detailed
FPGA---Electronic-clock
- FPGA中用VHDL编写24小时普通电子时钟,可实现复位,程序整体写成,没有用到例化语句。-Electronic clock
chap3
- 全加器和记数器的测试文件,可直接用于modsim测试-Full adder and counter test documents, can be used directly in testing modsim
OV7670_Verilog
- 硬件方式初始化OV7670代码,使用Verilog,I2C_Controller.v为底层SCCB 驱动文件; I2C_CCD_Config.v为初始化参数在此文件中配置;cmos_top.v为硬件读取OV7670输出时序; 另外需要给OV7670 输入XCLK时钟, 可以是 50MHZ-Hardware initialized OV7670 code using Verilog I2C_Controller.v the underlying the SCCB driver fil
fir-vhdl
- 用Vhdl硬件描述语言编写的FIR数字滤波器-Vhdl using Hardware Descr iption Languages in preparing the FIR digital filter
filter
- 各种滤波器的源文件,供大家参考!已经测试了一下-Source files of various filters, for your reference! Have tested the look
ad5791
- 在Quartus环境下编写,使用Cyclong系列芯片,配置七通道高精度AD5791,该例子为AD5791的FPGA配置使能代码,包括模拟数据输入模块,复位模块,命令接收是能配置模块。-AD5781,Digital signal convert to Analog signal
VHDL
- 计算器实现 功能简单容易实现 可自我调试至更强大性能,不喜勿下-Calculator features simple and easy to achieve self-commissioning to a more powerful performance, do not like not under
feng_ac88
- PV modules contain, MPPT module, BOOST module, inverter module, Dimensional phononic crystals FDTD method calculation examples band gap, The signal spectral analysis and filtering.
