资源列表
FPGA-DSP
- vhdl编写的FPGA与DSP接口程序，在FPGA内分配了两块双BUFFER与DSP进行通信-vhdl prepared FPGA and DSP interface program, the FPGA within the allocated 2 pairs of BUFFER to communicate with the DSP
cop2000
- 模型机仿真的VHDL语言描述，在xilink9.1环境中实现。-VHDL simulation model of machine language to describe, in xilink9.1 environment implementation.
cpu
- 用Verilog语言编写的单周期cpu，实现的指令有 add,addu,addi,addiu,sub,subu,clo,clz,xori,nor,slt,slti,sltu,sltiu,blez,j.-Verilog languages ??with single-cycle cpu, implementation instructions are add, addu, addi, addiu, sub, subu, clo, clz, xori, nor, slt, slti, sltu,
fft_8
- 基于FPGA的8点fft的verilog实现-8 point of fft verilog implementation
LED_ontrol_VHDL
- 基于FPGA的LED控制电路设计资料（VHDL程序）-LED control circuit design information (VHDL)
verilog_hitag
- 使用verilog语言实现HITAG2加密算法的实现，即硬件实现 已经验证与C语言结果一致-Use the verilog language HITAG2 encryption algorithm realization that the hardware implementation
ddr2
- ddr2的功能控制模块，3部分，只要调取就可以。-ddr2 control codes
vga
- VGA wrapper written in VHDL. This wrapper can be used to send VGA signals to the FPGA
allcode
- Verilog Source Code Basys2 , SevenSegment and Switch LED Intraction
rs232_tr
- 自学的串口通信模块，包含接收模块，发送模块，波特率模块，顶层模块-RS232 communication application,VHDL code
jiaotongdeng
- 交通灯，实现一段时间后绿灯变红灯，在此之间还会变化到黄灯的功能，大概时间是40秒-Traffic light, green light after a period of change to achieve a red light, this will change to yellow between the functions, the approximate time is 40 seconds
opb_lcd_controller_v1_00_a
- spartan3系列fpga opb模式下lcd液晶屏控制代码-spartan3 Series fpga opb mode lcd LCD screen control code