资源列表
acum_hdl
- phase accumolator in vhdl & test bench for it for dds-phase accumolator in vhdl & test bench for it for dds
三人表决器
- Three-input Majority Voter -- The entity declaration is followed by three alternative architectures which achieve the same functionality in different ways. -Three-input Majority Voter -- The entity declaration is followed by three alternative a
divide
- 关于verilog的分频程序 等占空比 非等占空比 小数分频 奇数分频-Verilog frequency on the sub-procedures such as the duty cycle of non-duty-cycle fractional odd frequency, etc.
diandongche.ASM
- 电动车控制器系统源代码程序或许有一点帮助-electric bicycle controller
cnt_24_led
- cnt_24_led code in verilog
VHDLtransmitter
- 这是我做UART时候做的一个发送器的源码，希望对大家有用。-This is what I did do a UART transmitter when the source and hope for all of us.
FreqMeterAuto
- 能实现自动量程切换的数字频率计数器，可根据输入信号频率实现量程切换，具有7个档位，测频范围由系统时钟和FPGA实现芯片决定-Automatic Digital Frequency Meter
Calculator
- 采用FPGA编写代码，包含了3-8译码器，加法器，减法器，乘法器的功能。-The FPGA write code, including a 3-8 decoder, adder, subtractor, multiplier function.
verilog
- 矩阵键盘未消抖 用verilog语言编写，文件简介明了。容易看都和修改。-Matrix not away with verilog keyboard shake language, file introduction and clear. Easy to see all and modification.
i2ctest
- i2c模块，产品上一直在用的一个模块，一直很稳定，时钟频率为61.44MHz，如果频率不对，源码里的分频大家自己再算一下-i2c module