资源列表
sv_mux.tar
- it is the verification code written in system verilog for the verification of 4:1 mux and with functional coverage
414-mirza
- verilog vending machine code
hello_world
- 基于nisoII软核的摇摇棒设计，带中断-Rod shook nisoII soft-core-based design, with interrupt
counterdisplay
- VHDL编写的计数和显示程序，对于学习VHDL语言的朋友有一定帮助！-VHDL prepared by the count and display program for learning VHDL friends will definitely help!
chap6
- 《Verilog HDL 程序设计教程》3-"Verilog HDL Design Guide" 3
AM_DE
- AM信号解调的FPGA实现。用VHDL编写，验证通过的-discribe the AM,tell you hwo to use it.
lock-and-lcd
- 基于博创实验箱UP-CUP-FPGA2C35-Ⅱ和Verilog HDL硬件描述语言，分为按键输入模块、LED指示灯模块及LCD显示模块，采用按键BTN1、BTN2作为输入端输入四位密码与事先设定的密码进行匹配，由D1、D2、D3、D4四盏LED灯来指示输入密码的位数。开机时，LCD显示“HELLO! WELCOME!Enter the code:当”，密码输入正确时，LED灯D7亮，同时在实验箱LCD显示屏上显示字符串“Good! Well done!you are right!!!”，当密码
vhdl
- 数码管现实bcd码的解码过程，0000-1001用数码管现实译码结果-Bcd nixie tube reality code
Touch_panel
- ad7843 driver code vhdl
ADC_CTRL
- 一个关于AD转换的原代码，对初学者有所帮助
top
- FPGA实现dds，可调频，任意波形，键盘输入。三角正弦锯齿波都有-FPGA realizing, can change the frequency, any DDS waveform, the keyboard input. The triangle sine sawtooth wave
JTAG
- JTAG convertor to control the processor I/Os pins