资源列表
mqst
- 基于CPLD的数字通信系统曼切斯特用VHDL产生 曼切斯特信号-CPLD-based digital communications system Manchester Manchester signal generated by VHDL
PS2
- PS2键盘读取程序，直接调用PS2.h中的函数即可。在main函数中有详细的例程。非常好用-PS2 keyboard reading program, a direct call to the function can be PS2.h. In the main function of the routine in detail. Is very easy to use
fir_128factor
- 使用verilog 编写的128阶低通滤波器，抽头系数可调。-Prepared using verilog-order low-pass filter 128, the tap coefficients adjustable.
Vhdl1
- slave I2c的源码,同时可以支持多个slave模块-slave I2c source, and can support multiple slave modules
Cordic_Verilog
- 基于FPGA平台的，坐标旋转数字计算方法Cordic的Verilog描述。可用于计算sin、cos等三角函数。-Cordic in verilog hdl
RS_ENCODER
- DVBC RS编码,标准TS流输入输出接口!-DVBC RS encoder
ram
- 本原代码中利用VHDL语言编写了RAM、FIFO、ROM等常用的存储和缓冲部件，完全的代码在ALTERA的FPGA上已经通过仿真测试，保证可用.-primitive code using VHDL prepared RAM, FIFO, ROM, and other commonly used storage and buffer components, complete code in the Altera FPGA simulation test has been passed to ens
8risc
- 8位RISC CPU,包括alu,count,machine-8 bit risc cpu
iic_ctrl
- 基于Verilog的IIC接口，使用状态机实现，可以支持速率参数化。-implement IIC master controller by using Verilog language.
alu
- this file is vhdl code of alu
fast_pll
- fpga的pll锁相设计，altera器件EP1s25的选用、设计-phase-locked pll of fpga design, altera devices EP1s25 selection, design
h264quantise
- H.264 quantization block in VHDL.