资源列表
Electronic design
- Is a code that detects peaks on a signal.
design
- This is information about design
4dpsk
- 4dbpsk系统的设计实现源码，几个朋友用一个假期的时间协作完成，功能非常好-The 4dbpsk system design realization source code, several friends complete it cooperation in one vacation time , the function is extremely good
fifo
- fifo designed by haneesh (me) in verilog-fifo designed by haneesh (me) in verilog
closed_SPWM
- 带PI闭环测试生成的SPWM方案已通过测试，可以实现SPWM输出 -SPWM scheme with a PI closed-loop test generation has been tested, you can achieve SPWM output
mimasuo
- 密码锁 支持修改密码 按任意键后 10秒未解锁则锁定-Locks to support modified password lock 10 seconds after any key to unlock
divide_by_3
- 时钟的3分频代码，华为中兴面试必备，仿真测试通过-divede by 3
chap6
- 10个VHDL的经典实例，加法计数器中的进程，任务举例，测试程序，函数-10 VHDL classic example of the counter in the process of addition, tasks for example, test procedures, functions. . .
chengxu
- 4位乘法器，4位除法器，K倍频的VHDL实现-Four multipliers, four dividers, K multiplier of VHDL
ddr_top
- This VHDL or Verilog source code is intended as a design reference // which illustrates how these types of functions can be implemented. // It is the user s responsibility to verify their design for // consistency and functionality through the
profiles
- source code of counter,ram,lfsr etc
rng
- wishbone规格下的rng代码的实现，自己编写顶层模块可以在modelsim下实现仿真-wishbone rng specifications under the implementation of the code, you can write your own top-level module under modelsim for simulation