资源列表
A-to-D-VerilogHDL
- 在硬體上將十進制轉二進制，不需要使用加法器的運\算方式，大大減少運\算的時間。
distributivealgorithm
- this files having verilog distributive arithmetic operations
APB_I2S
- 这是一个中文版的i2S总线，对搞硬件的朋友会有帮助的-This is a Chinese version of the i2S bus, friends are engaged in the hardware would be helpful
Dual_port_RAM
- Verilog语言实现的算端口模块（Dual_port_ram)
cpld
- CPLD 语言VHDL，实现对电机位置信号检测和输出驱动-CPLD language VHDL, to realize the motor position signal detection and output drive
uart-con
- This is a vhdl file for implementing UART.
stallpipelineup
- pipelining used on negative clock edge
ImageRotate
- verilog实现图像旋转，可终合，并带有Testbench-verilog image rotation, and can be a final, and with Testbench
spi_dac_max5309
- dac 与FPGA的SPI接口通信 , SPI 接口协议请查阅网络相关资料-communication between FPGA and DAC max5309
ML605_RX_H264
- H.264视频压缩硬件语言，基于ＦＰＧＡ的设计语言。非常棒的语言设计-Solution of H.264 video compression hardware design language, based on FPGA language
ov7670_registers
- ov7670的寄存器的配置，完成自动曝光自动白平衡-ov7670 configuration register，Complete AE AWB