资源列表
LTC_1867_driver
- Verilog实现LTC1867的驱动程序，功能：四路单端输入CH0~CH3，系统时钟频率50MHZ，SCK为12.5MHZ，接收数据按通道四路实时输出，输出频率为100HZ，16位数据。-Verilog realize LTC1867 driver features: four single-ended input CH0 ~ CH3, the system clock frequency is 50MHZ, SCK is 12.5MHZ, receive data by channel fo
EX7_BINARY2GRAY
- 本模块是实现格雷码和二进制码的转换，并给出仿真测试文件-This module is to achieve the conversion of Gray code and binary code, and give the simulation test file
SRAM
- 实现3,8译码器的源码，编译过，很好用，-Achieve 3,8 decoder source code, compiled, very good, Oh
CycloneIII_EP3C40F780C8_8_UART
- SOPC,CycloneIII系列芯片EP3C40F780C8，NIOS II IDE,UART 实验代码-SOPC,CycloneIII，EP3C40F780C8，UART code
FpgaConfig_CS_20090508
- 自己写的一个使用单片机配置FPGA的上位机C#代码，使用串口通讯。-Wrote it myself, using a microcontroller to configure FPGA-Host Computer C# code, the use of serial communication.
MIPS
- 组成原理大作业--基于MIPS的运算器设计，内附详细设计文档，包含设计文档和使用手册，主程序，测试程序，还有设计的框图等。实现了可以执行基本的MIPS有关运算器相关的指令共17条，用Verilog编写。-Composition Principle big operation- based on the MIPS computing design, containing a detailed design document, including design documentation and u
MIPS
- MIPS处理器的组员大作业，可以直接运行，提交，环境是quartus-MIPS processor crew great job, you can run directly, the author, the environment is quartusII
Miller
- 课程设计、原理图、编译码VHDL语言描述-Curriculum design, schematics, VHDL language to describe the encoding and decoding
SD_Card_test
- SD卡读写程序,SPI接口实现，采用verilog hdl实现- SD read and write test
lab5
- 用xilinx ISE14.3开发的单周期CPU系统，面向spartan Ⅲ板，仿真调试与实际测试均已通过。-Developed by xilinx ISE14.3 single-cycle CPU system, facing the spartan Ⅲ board simulation debugging and practical tests have passed.
sram_c4
- sram 进行单独读写的实验源代码 可以免费下载-sram separate read and write the source code available for free download experiment
QuartusII3.0
- QuartusII 3.0学习教程 ，chm文件，经典-study guides, chm, classic