资源列表
pico04_mem_uart.rar
- picoblaze实现串口通信...难道一定要20个字吗?,implement uart communication base on picoblaze
num_clock
- 基于DE0实验板开发的verilog数字钟程序。实现了12/24小时制切换；闹钟；整点报时等功能。-Based on experimental board development DE0 verilog digital clock procedures. To achieve a 12/24 hour switch alarm clock whole point timekeeping function.
zjw
- XILINX ise上成功实现源文件、仿真文件、约束文件的编写，经验证正确无误-XILINX ise on the successful implementation of the source files, simulation files, the constraint file preparation, proven correct
m_sequence
- 基于fpga verilog语言生成的m序列。(Generating m sequences based on FPGA)
sci_to_mcbsp
- 自己写的 mcbsp 转 sci 和 sci转mcbsp 的verilog的程序，欢迎大家 指点，开发环境是Quartus II。-Write their own sci and sci mcbsp turn mcbsp turn the verilog program, we welcome the guidance, the development environment is the Quartus II.
u_pan_yinyue
- verilog程序，可实现从U盘中读取mp3音乐进行播放，同时可在显示屏上显示歌词。-verilog procedures, which are read the U disk mp3 music playback, lyrics can be displayed simultaneously on the screen.
USB_SOFT
- 公司开发板程序E-PLAY-EP4CE40 USB接口源码-E-PLAY-EP4CE40 USB interface source code of corporate development board procedures
wallace
- it is a multiplier used in RIsc architecture based processor.......
a_num(DB)
- 实现一个数码管由1到F的顺序显示，适用于Cyclone IV E EP4CE115F29C7芯片，管脚可自行分配-Implement a digital tube display by the order of 1 to F, suitable for Cyclone IV E EP4CE115F29C7 chip pins can Discretionary
GPS-IF-SignalAcquisition
- 基于FPGA 的GPS中频信号处理和相关捕获算法研究-FPGA-based GPS IF signal processing and acquisition algorithm
calc
- 一个简单的verilog计算器设计，键盘输入，数码管显示，实现加减与或运算-A simple calculator verilog design, keyboard input, digital display, Modified with OR operator
USB--LCD
- USB+LCD1602的现实 USB芯片CY7C68013 可以显示任意数-USB+ LCD1602 reality CY7C68013 USB chip can display any number of