资源列表
8051_latest.tar
- VHDL/VERILOG FOR 8051 Core
miaobiao
- quartusii软件仿真实验代码 秒表 24小时计时-quartusii software simulation code stopwatch 24 hour time
jiafaqi
- quartusii软件仿真实验代码 十进制加法计数器-quartusii software simulation code decimal addition counter
fenpinpi
- quartusii软件仿真实验代码 分频器-quartusii software simulation code divider
digital_frequency
- 用verilog实现数字频率计的设计，具有自动换挡功能，采用t法和m法设计，低频显示周期。量程为0.5~10Mhz。开发环境为quartus-This is a method of designing a digital frequency-measuring device. It can measure frequency ranging from 0.5Hz to 10MHz. It is developed in the program of Quartus.
quaddecoder_verilog_ise11.2_used_09042010
- Two simple Quadrature decoder and Counter build in a XILINX XC9536 CPLD. This Core is coded in Verilog and contains the compete Project file and the fitted quad.jed File. The Pinout is descr ipted in the Constrained file quad.ucf. To use them, y
FirstAndriod
- andriod开发学习演示代码，适合初次初次接触andriod人员的学习-andriod study demonstrates the development code, first initial contact for staff learning andriod
sdramtEST
- sdram动态存储器测试的源文件工程，Quartus II 9.0 (32-Bit)版本。-sdram TEST
music
- 借助于功能强大的EDA工具和硬件描述语言,以纯硬件完成乐曲演奏电路。程序中的歌曲是同一首歌。-With powerful EDA tools and hardware descr iption language, in order to complete the music play pure hardware circuitry. Program in the song is the same song.
ad2902
- AD2902是一款adc芯片，适用于速度要求比较高的系统，本代码开发了FPGA控制AD2902的程序。-AD2902 is a kind of ADC chip.it is a fast speed chip. so it is usually used in FPGA or DSP system.
ad9958
- AD9958是一款功能强大的DDS芯片，是AD公司新上市的产品，能够产生标准信号已及线性调频，非线性调频等信号。-AD9958 is a new chip with much more greater function.It is very suitable in signal processing. It can generate kinds of signal format such as standord signal and lfm signal.
LAB34
- EDA基础_综合实验篇__实验三十四 正弦信号发生器-EDA based on comprehensive test papers _ __ sinusoidal signal generator test 34