资源列表
verilog_basics
- Very nice introduction to Verilog by Teemu Pitkä nen
utopia
- utopia，system verilog写的CPU测试平台代码-utopia, system verilog code written in CPU test platform
Behaviour
- 这是一个使用VHDL编写的8051的CPLD行为代码,-there are several modules for 8051 MCU wrote by VHDL
eeprm
- verilog编写的EEPROM代码,包括我们最常用的AT24C02/24C04/24C08/24C16-eeprm is a verilog HDL behavioral model for AT24C02/4/8/16
an294_16x16
- Verilog编写的16x16的可交叉的CPLD程序,可用在16个VGA入,16个VGA输出-16x16 cross switch CPLD software wrote by verilog which can be used in 16 VGA input , 16 VGA output application
12334
- verilog HDL reference
Xilinx_Tutorial
- XILINX FPGA TUTORIALS PDF FILE
Verilog-HDL
- 《北航常晓明Verilog应用》一书的pdf完整版，是学习Verilog的好书-" Beihang Chang Xiaoming Verilog Applications" pdf full version of the book is a good book to learn Verilog
QutartusII_compatibility
- 关于Qutartus II 器件垂直移植（兼容设计）方法-Qutartus II devices on the vertical transfer (compatible design) method
quartus_warning_analysis
- Quartus常见警告分析，中英文注释，非常实用的资料。-Quartus warning and errors analysis
fifo
- 很多关于FIFO的文章其实讨论的都是空/满标志的不同算法问题。 在Vijay A. Nebhrajani的《异步FIFO结构》一文中，作者提出了两个关于FIFO空/满标志的算法。 -FIFO FULL/EMPTY Arithmetic