资源列表
zsy_422_20160911_backup
- RS422协议芯片OX16C950底层驱动程序，Verilog语言编写，Quartus ii 15.0开发，可实现数据收发，用串口调试助手可以观察。-RS422 protocol chip OX16C950 low-level driver, Verilog language, Quartus ii 15.0 development, can achieve data transceiver, with the serial debugging assistant can be observed
rna
- top transmition of implement spi, compiled in vivado 2016 in basys 3
Dac_spi
- spi dac for artix7 vivado
CISCmodel-machane
- cisc 模型机设计全部文件cisc Model Design All files-cisc Model Design All files
CY7C1387KV33
- Read the readme file
vivado-boards-master
- xilinx 的vivado开发板的板级支持包。直接拷贝到vivado安装目录下就可以。-xilinx vivado examples
frequency-division
- 分频，对原时钟进行2分频，三分频，四分频，和八分频-frequency division
viterbi_soft
- 维特比译码器，调用IP核，软判决输入，开发平台Xilinx Spartan-6系列FPGA-viterbi decoder, using IP core resource, soft decision input,develop platform is Xilinx Spartan-6 series FPGA
LED-light
- 流水灯控制程序，用于控制LED灯的闪烁，调试通过的，用于FPGA开发-Water lamp control procedures for the control of LED lights flashing, debugging through the use of FPGA development
Microblaze_Spartan6
- 这是利用Spartan6搭建的MicroBlaze，完成为了众多功能，上层是利用c语言开发，利用底层硬件层提供的API接口。-This is the use Spartan6 built MicroBlaze, in order to complete the many functions of the upper layer is to use c language development, the use of the API interface provided by the underl
14_ethernet_test
- 这是利用FPGA实现对以太网传输的控制。FPGA为Spartan 6 LX16，以太网芯片为RTL8211。千兆传输速率。语言为Verilog，但没找到这一选项，故选择了最接近的VHDL-This is achieved using the FPGA Ethernet transmission control. FPGA for the Spartan 6 LX16, Ethernet chip RTL8211. Gigabit transmission rate.
05_NIOS_SRAM
- 利用FPGA的NIOS 2控制SRAM。FPGA的型号为Altera 的Cyclone 4。-Of FPGA NIOS 2 control SRAM. Altera' s FPGA model for the Cyclone 4.