资源列表
vip_ex2
- ddr2读写测试程序，很好很经典，学习DDR2的同学值得下载学习-Ddr2 read and write test procedures, very classic, learning DDR2 students worth downloading learning
PL_LED_TEST
- zedboard板的流水灯程序，采用verilog语言编写-Zedboard board water lights procedures, the use of verilog language
pcpu_handle_mem
- Verilog实现五级流水线CPU，hazard以及时序功能已经实现。-Realize five-stage pipeline CPU
ultimate_crc.tar
- Ultimate CRC Check RTL Verilog Code
rsencoder.tar
- RS Encoder RTL verilog Code
DE2_Media_Computer-sdcard
- ALTERA COMPUTER ORGANIZATION VHDL SOURCE FILES
Extras_Edge_Detection
- ALTERA DE1 SOC VHDL SOURCE CODE
uart
- VHDL语言模拟异步串口程序，实测可用，欢迎下载-uart source design by FPGA
CAN-IP
- CAN控制器IP核(可直接在Nios II中使用)-CAN controller IP core (Nios II can be used directly in the middle)
m2s050-som-fg484-1a
- Microsemi M2SSOM KIT Project
div84
- An 8-Bit Divider using a Procedure
lcd16x2_ctrl
- lcd16*2初始化源码，verilog 可直接引用-lcd16*2 initialization