资源列表
snake
- 自己写的verilog贪吃蛇程序，使用vivado2015.2软件编写综合的，硬件平台是xilinx的basys3平台，当检测到碰撞时，led灯会亮起-Write your own verilog Snake program, using the software to prepare a comprehensive vivado2015.2, the hardware platform is the basys3 xilinx platform, when a collision is det
udpip
- 赛灵思XILINX FPGA verilog写的UDP/IP协议，可用。-I am prepared to use verilog UDP protocol, the test is available.
lab6-3-8DECODER
- 数字设计和计算机体系结构：用verilog语言描述3-8译码器的设计与实现-Digital design and computer architecture: use verilog language describe 3-8 decoder design and implementation
SEG7
- 用verilog语言完成对七段译码器的设计和实现-Complete with verilog language design and implementation of seven-segment decoder
MUX2_4bit
- 数字设计和计算机体系结构-用verilog语言完成4位二选一数据选择器的设计-Digital design and computer architecture- complete the four alternatives with verilog language data selector design
compare2bits
- 中山大学数字设计和计算机体系结构-2位比较器的设计和实现-Sun yat-sen university digital design and computer architecture- 2 a design and implementation of the comparator
SHIFT4_Parallel-input-serial-output
- 4位串行输入并行输出移位寄存器和移位寄存器产生伪随机序列的源代码以及相关分析-Four serial input and parallel output shift register and shift register of the source code of pseudo-random sequence and correlation analysis
of
- VHDL源码OFDM信号传输系统基于FPGA(Field-Programmable Gate Array)-VHDL source OFDM signal transmission system based on
AMBA
- AMBA总线的Verilog语言模型，主要包括5个部分：AHB总线仲裁器，AHB-APB总线桥接器，AHB总线上从设备ROM模型-AMBA bus of ARM company, It mainly includes the following five parts: the AHB arbiter,AHB-APB bridge, AHB_Rom_Slave, AHB_Ram_Slave
ARINC_429
- FPGA实现ARINC429协议，利用verilog HDL做了完整的ARINC429通信收发协议，EDA开发平台为quartus ii9.1。-FPGA implementation ARINC429 protocol using verilog HDL to do a complete ARINC429 communication transceiver protocol, EDA development platform quartus ii9.1.
half_integer
- 数控分频器：以2.5分频为例的半整数分频器-half-integer frequency divider
Pong
- game.rst game.v pong.v game.vhd