- VHDL_PCM 利 用 来 vhdl 设 计 p cm的 实 现
- jabba is a basic Jabber client written in C++ using ncurses. It was one of my early university projects so it s value is mostly educational but it works :)
- ImgCounts2.0 防刷新页面访问计数器
- TaskKiller Android task killer 进程杀手
- 13-Workload_Analysis_for_Projects_and_APO-(1) hi
- sfbbs 加入了发光字
资源列表
FPGA_phase-shift
- 本文介绍基于FPGA和DDFS技术，应用Altera公司的FPGA开发工具DSP Builder设计数字移相信号发生器，该数字移相信号发生器的频率、相位、幅度均可预置，分辨率高，精确可调。-This paper introduces FPGA and DDFS technology based on FPGA development tools DSP Builder design of digital phase shift signal generator using Altera, fre
Adder-Designs-using-Reversible-Logic-Gates
- REVERSIBLE LOGIC BASED ADDERS DOCUMENTATION
brent_kung_add
- BRENT KUNG ADDER CODE
CRC-DOCUMENTATION
- CYCLIC REDUNDACY CHECK DOCUMENTATION
binary-squarer
- BINARARY SQURING CIRCUIT DOCUMENTATION
cbl-documentation
- COMMON BOOLEAN LOGIC DOCUMENTATION
bcd-doc
- BINARY TO BCD DOCUMENT
MAC-DATA
- MAC UNIT DOCUMENTATION
FIFO-DOCUMENATATION
- DOCUMENTATION OF FIFO
FPGA-KZCJ
- NIOS2 FPGA控制TLC5540进行数据采集-FPGA TLC5540 control NIOS2 for data collection
06_pll_test
- PLL实现，在xilinx spartan 6的参考时钟50MHz上实现不同频率的锁相环程序-PLL implementation, in the Spartan Xilinx 6 reference clock 50MHz on the realization of different frequencies of the phase-locked loop program
led_test
- AX309 开发板的流水灯测试程序，实现四个LED灯流水，具体实现可以联系我-AX309 development board test procedures, to achieve four LED lights running water, the specific implementation can contact me