资源列表
scsa
- Speculative variable latency adders have attracted strong interest thanks to their capability to reduce average delay compared to traditional architectures. This proposes a novel variable latency speculative adder based on Han-Carlson parallel- prefi
State-Machine
- This gives the function of state machine
Proteus-lcd
- This gives the function of proteus
ARM7SEG
- this code gives the ARM processor function in 7segment
ARM-LED
- this code gives the function of ARM processor
module-car
- this program describes the state machine function by verilog code
iic_com
- Verilog写的I2C通信程序，亲自测过可用-I2c source code based on Verilog
SRAM-IS61LV25616-taobao
- SRAM-IS61LV25616,进行SRAM读写操作，淘宝上买的-SRAM-IS61LV25616, SRAM read and write operations performed on Taobao bought
S16C57
- 8位RISC CPU 设计IP，包含了文档、代码、仿真环境等-8BIT RISC MCU implemention reference ip,include rtl code,simulation and document
sha_core_latest.tar
- 完整的SHA 设计IP，可用于加密、IP SEC设计参考-FULL SHA IP DATABASE
eep
- 实现了基于SPI接口的EEPROM控制器功能-SPI-based EEPROM controller
Verilog_HDL_FPGA_washing
- 基于Verilog_HDL的FPGA程序(智能洗衣机) 以DE0板为开发工具-The FPGA-based Verilog_HDL program (smart washing machines) for the development of tools to DE0 board