资源列表
key_led
- 读取按键信号实验 如果按下的是key1,那么点亮LED1 如果按下的是key2,那么点亮LED1-LED2 以此类推，如果下按key8，那么全部点亮8个led-Read key signal experiment If you press the key1, then lit LED1 If you press the key2, then lit LED1-LED2 So, if the next press key8, then all lights 8 led
dled
- 用于动态数码管显示实验，可以看到动态数码管显示 -Dynamic digital display experiment
Clk50M_div_1HZ
- 分频实验，将50M时钟分频为1HZ，输出LED1，闪亮-Crossover experiment, 50M clock divider is 1HZ, output LED1, shiny
beep
- 蜂鸣器输出报警声实验 滴。。 滴-Buzzer alarm sound experiment drop. . drop. . drop. .
Risc128
- 128 bit RISC processor implementation in verilog
ALU32
- 32 bit ALU RTL Code using VHDL
quadratic_func_latest.tar
- QUADRATIC_FUNC used to implement arctan
xapp592
- sdi的发送和接收程序，使用XILINX ip核实现-SDI sending and receiving procedures, the use of XILINX nuclear IP
encoder-based-on-Gray-code
- 基于VHDL格雷码编码器的设计，可以在试验箱上直接运行-Design of VHDL encoder based on Gray code, can be run directly in the chamber
dds
- 直接数字频率合成法产生正弦波，方波，锯齿波，三角波等基本波形。-Generate sine wave, direct digital frequency synthesis method of square wave, sawtooth wave, triangle wave and other basic waveform.
clkdivverilog
- 使用verilog 计数50次 实现50分频，以此类推，分频器-clkdiv using verilog，
bishe_VGA
- 基于FPGA的VGA动态显示，有花纹，棋盘，以及图像的显示。还有音乐的播放。采用verilog语言-FPGA-based VGA display dynamic, with patterns, checkerboard, and the image is displayed. And music playback. Using verilog language