资源列表
exp18
- 这是一个vhdl的交通灯程序，可以实现两个方向间红、黄、绿灯之间的亮灭转换，同时还有秒表的计数、显示功能，为学习vhdl的人提供一定的技术参考。-This is a vhdl traffic lights procedures can be achieved between the two directions of red, yellow, green light off between the conversion, as well as the stopwatch count, displ
pulse_mo
- 这是一个vhdl的脉冲调制程序，可以调制脉宽、占空比、周期等参数，为学习vhdl的人提供了非常好的参考历程。-This is a pulse modulation vhdl program, can be modulated pulse width, duty cycle, period and other parameters, for people to learn vhdl reference provides a very good course.
m
- 这是vhdl编写的产生7位m序列的程序，类比可以产生更多为的。而m序列即可作为输入测试信号，也可以模拟噪声。-It is written vhdl 7 m sequence generation process, can produce more for the analogy. The m-sequence can be used as an input test signal, it can simulate noise.
key_state
- 这是用vhdl编写的状态机来实现对灯的控制。比较简单，但对于状态机的理解是更进一步。-It is written vhdl state machine to achieve control of the lamp. Is relatively simple, but for the state machine is further understood.
triangle
- 这是用vhdl编写的三角波产生程序，比较简单，但是对于开发学者的思维还是有帮助的。当时我受益颇多，拿出分享。-This is a program used to generate the triangular wave vhdl written, relatively simple, but for the development of academic thinking is helpful. At that time, I benefited a lot, come to share.
sin_rising_judge
- 这是用vhdl编写的正弦波触发程序，用单片机和fpga做示波器时，可以参考一下这个触发程序。-It is written by vhdl sine trigger when MCU and fpga do oscilloscope, you can refer to the trigger.
freq_cnt
- Frequency Counter in Verilog
Designing_With_FPGA_Part-3_RS232
- Designing_With_FPGA_Part 3_RS232.rar
Designing_With_FPGA_Part-2_LCD
- Designing With FPGA - Part 2
Designing_With_FPGA_Part-1_I2C-Interface
- Designing_With_FPGA_Part 1_I2C Interface.rar
10-mandamientos-FPGA
- The ten Commandments of Excellent Disign
ddr3_model
- 一个verilog语言开发编写的简单的ddr3模型-A simple model ddr3, written with verilog language