资源列表
xapp460
- Video Connectivity Using TMDS
xapp928
- Digital Display Panel Reference Design
xapp740_axi_video
- High-Performance Video with the AXI Interconnect
dna_rd
- Xilinx Spartan-6 FPGA读取DNA数据并进行比较，产生比较结果信号输出。-Xilinx Spartan-6FPGA DNA data is read and compared, generate a comparison result signal output.
PipelineCPU2
- Modulsim下Verilog写的五级流水线32位简易CPU-five level pipeline CPU written in Verilog.
tut_DE2_sdram_verilog
- DE2 sdram 的verilog 教学材料-tut_DE2 sdram verilog.
FFT
- 很好的fft学习程序感兴趣的同学可以看哈，下载一下。-it is very good
FullAdder
- ful adder code in vhdl which has 3 inputs and 2 outpus
Encoder8_3
- this is a source code for 3 is to 8 decoder
counter8
- this is a souce code for 8 bit counter
comparator
- this is a souce code for comparator
RAM
- this is a souce code for synchronous RAM