资源列表
MIPS-processor-Verilog-code
- 原创，MIPS处理器Verilog源码，在FPGA实现单周期MIPS处理器，实现存储访问指令load word(lw)和store word(sw)，算术逻辑指令add、addi、sub、and、or和slt跳转指令branch equal(beq)和jump(j)-Original, achieves single-cycle MIPS processor MIPS processor Verilog source code, the FPGA, storage access instruct
4choose1
- 北邮数电基础实验 4人表决器 的VHDL语言实现工程文件-4people choose
ClkDivide
- This my version of the unit which carries out the division of the input signal-This is my version of the unit which carries out the division of the input signal
microwave-oven
- 这是个微波炉的VHDL程序，描述了定时，复位，倒计时等功能-It is a process of VHDL,describing microwave oven how to work
gh_CORDIC_rotation
- This my version of the block, performing the functions of the quadrature oscillator-This is my version of the block, performing the functions of the quadrature oscillator
mem
- This my version of a memory module that can be used in a digital device to store the filter coefficients.-This is my version of a memory module that can be used in a digital device to store the filter coefficients.
SignedMul18x18
- This my version of the scale, and the multiplier block, which can be used in digital devices-This is my version of the scale, and the multiplier block, which can be used in digital devices
Datapath
- datapath of 8bit synthesized risc processor
chufaqi
- 64位除法器，可计算商和余数，时序，测试通过-64bit divider
u3vw1x.ZIP
- 复件 一种数字频率合成器的FPGA实现技术Copy of a digital frequency synthesizer FPGA implementation technology-Copy of a digital frequency synthesizer FPGA implementation technology
mn4op8.ZIP
- 基于FPGA的LPDC译码实现Based on the FPGA LPDC decoding implementation-Based on the FPGA LPDC decoding implementation
uC_OS-II-Porting-to-S3E
- 在Spartan-3 Starter上移植μC/OS-II的完整笔记，也可作为EDK环境下所有其他型号FPGA的μC/OS-II移植参考-COM609_μC_OS-II Porting to Spartan-3 Starter Board