资源列表
DE2_UserManuall
- altera DE2 用户手册The DE2 package contains all components needed to use the DE2 board in conjunction with a computer that runs the Microsoft Windows software. -altera DE2 用户手册The DE2 package contains all components needed to use the DE2 board in con
hello
- 完成字符串“HELLO”逐个左移位循环与右移位循环的设计与下载。-To complete the string "HELLO" Design and download one by one left shift cycle and right shift cycle.
capature_key
- 实现检测按键与控制LED进行显示，利用ISE10.1版本，及ALMIGHTY开发板实现按键驱动LED的实验-Detection key and control LED to display
DDR-with-CoolRunner-II
- 详细讲解了CoolRunner II CPLD与DDR SDRAM的接口设计-Explained in detail about the design of the CoolRunner II CPLDs and DDR SDRAM interface
MatrixDisplay
- SOURCE CODE FOR LED MATRIX
com8001matlab_cpp_007
- zip file for usb 2.0 interfacing with fpga
8051
- 8051IP核，很多人想要的8051IPCORE，可以实现8051的功能-failed to translate
verilog
- 用verilog编写的代码，实现了16QAM调制解调功能-the realization of 16QAM modulation and demodulation on Verilog language
source
- s3c44bo的lcd屏幕控制，以及在其上显示应用程序-S3C44BO LCD screen control, and its display applications
VHDL
- 该源码包全面详细的描述了一个基于VHDL的抢答器设计运行于Alter公司的FPGA上-The source package detail an answer based on the VHDL designed to run on Alter FPGA
led_test
- 开发FPGA的入门程序.是一个4个LED点亮程序-Entry procedures for the development of FPGA sponser links:
Frame-synchronizer-
- 原创，帧同步器的Verilog代码，在FPGA上验证实现过，无误。作为通信系统帧传输的仿真，有限状态机同步态和失步态的切换仿真。-Original Verilog code for frame synchronization, verify the implementation on the FPGA, and correct. Frame transmission as the communication system simulation, finite state machine sync