资源列表
runled
- 利用sopc和nios开发的跑马灯程序，比较基本，包含完整的工程-Marquee program use sopc nios development, the more basic, including the complete project
counter
- 利用verilog开发的计数器程序，比较基本，包含完整的工程-Use of the the verilog development of counter program, more basic, including complete engineering
verilog
- 梁祝音乐发生器verilog 4HZ 4MHZ-verolog vhdl
8_RISC_CPU
- risc-cpu，简单的cpu设计,强大的功能简洁的设计，精简化-verilog risc_cpu
traffic-light-controller-VHDL
- vHDL实现 自顶向下的 交通灯控制器 -VHDL program implement for traffic light controller
clk_gen.v
- 时钟发生器，用计数器功能编写的，能更好的潜入模块中,risc-cpu的一部分-clk_gen verilog
LCD12864
- utilizing verilog achieve the implement of lcd12864 (no word stock)display of Chinese characters-utilizing verilog achieve the implement of lcd12864 (no word stock)display of Chinese characters
use-s3c2440-to-show-charcter
- 先把字库变换成一个超大的数组，在LED屏上通过调用字库绘制中文字符和ASCII字符-First transform the character into a large array, by calling the font on the LED screen to draw Chinese characters and ASCII characters
MIPSCPU_MultiCircle
- 流水线的一个循环源码设计，基于mips流水线的设计-Pipeline a loop source design, based on the design of the mips pipeline
MIPSCPU_Pipeline
- 流水线的设计，基于mips流水线的管道设计-Pipeline design, pipeline design based on mips pipeline
MIPSCPU_SingleCircle
- 流水线的开发，基于单流水线的一个设计与开发-Pipeline development, based on a design and development of the single pipeline
CA-CFAR
- CA CFAR Algorithm implementation in FPGA