资源列表
SRAM_16Bit_512K
- terasic的DM9000A模块源码，使用nios2做以太网应用的应该会用到-terasic the DM9000A module source, use nios2 do Ethernet applications should be used
dds
- 是vhdl语言写的dds的部分代码，留下来，方便以后查看-The vhdl language written dds part of the code , to stay , convenient View
fp-im-of
- its abt in vhdl ,frequency estiator
Multi
- A Complete Multicycle CPU Written in Verilog Lang.
dds
- 可以完成直接频率合成器功能的VHDL代码-VHDL code which can complete the function of Direct frequency synthesizer.
Foreign-classic-Verilog-code
- 国外经典verilog代码 养成良好的代码风格-Foreign classic Verilog code
ASSIGNMENT3
- Implementation of risc processor program in verilog coding.-Implementation of risc processor program in verilog coding.
SEG7_LUT_8
- terasic的DM9000A模块源码，使用nios2做以太网应用的应该会用到-terasic the DM9000A module source, use nios2 do Ethernet applications should be used
zcjj
- 该算法使用于AD转换，它是运用EDA技术通过对逐次渐进法进行编程实现的，运算快速，正确率高-The algorithm uses the AD converter, it is the use of EDA technology through programming on a successive approximation method, fast computing, the correct rate
freq_meter
- 使用verilog写的频率计，可切换档位-Frequency counter using verilog write switch stalls
Frequency8bit-OK
- 8位频率计 CPLD VHDL EMP570 ALTERA-Frequency8bit CPLD VHDL EMP570 ALTERA
led
- 实现流水灯的设计，在ISE8.2下进行开发！芯片为virtex4-Design of light water