资源列表
Yeni-WinRAR-archive
- vhdl defination beginning starter
SPWM-output
- 利用FPGA，采用DDS技术产生具有死区控制的SPWM波-To utilize FPGA, generation of DDS technology with deadband control SPWM wave
Lamp-from-left-to-right
- 接在P0口的8个LED从左到右循环依次点亮，产生走马灯效果-Then were lit in P0 port 8 LED from left to right cycle, resulting in a revolving door effect
Verilog
- verilog语法,硬件FPGA编程的工具-the verilog syntax, hardware FPGA programming tools
lift
- 运用VHDL实现可控三层电梯 利用LED和点阵表示电梯的上下 与楼层显示-Use VHDL to achieve controllable three elevator use of LED and dot matrix, said the elevator up and down the floor display
lab_3
- Verlog HDL实现m序列检测“1010”，如果有，则输出一个高电平-The m sequence detection, " 1010" Verlog HDL, if there is a high output
lab_1
- verlog HDL 实现3比特加法器 附带测试与限定文件-verlog HDL 3-bit adder with a test and qualified file
lab_2
- VHDL 实现M序列发生器 附带测试与限定文件-M-sequence generator VHDL incidental test with limited file
jzjpjsq_jiajianchengchu
- 基于Max+plus2软件Verilog VHDLy语言的矩阵键盘的加减乘除，在数码管上显示相关数据-Matrix keyboard, Math Max+plus2 software the Verilog VHDLy language, the relevant data is displayed on the digital
miaobiao
- 基于Max+plus2软件的Verilog VHDL语言的按键控制数码管显示秒表-Based on Max+plus2 software Verilog VHDL language button control digital display stopwatch
duogongnengshuzizhong
- 基于Max+plus2软件的Verilog VHDL语言的数码管显示多功能数字钟-Multifunctional digital clock digital tube based on Max+plus2 software Verilog VHDL language
PS2
- 基于FPGA的键盘PS第二类编码方式的verilog解码程序。 -FPGA keyboard PS encoding the verilog decoding procedures. FPGA keyboard PS encoding the verilog decoding procedures.