资源列表
Solutions
- FPGA代码，Designing_with_Quartus_II_Exercises_Ver11_v4_2.doc-FPGA code Designing_with_Quartus_II_Exercises_Ver1 1_v4_2.doc
verilog
- 通过I2C接口读写EEPROM 在本项目中，我们利用Verilog HDL实现了部分I2C总线功能，并能够通过该总线对AT24C02进行读写操作。为了便于观察读写eeprom的结果，我们将读写的数据同时显示在七段数码管上，并设定读写的数据从0到255不断循环，这样就可以方便进行比较。 -Through the I2C interface to read and write EEPROM in this project, we use Verilog HDL to achieve some o
UART1X
- code spimaster a de transmissor receptor
ps2
- ps2接口的实验程序，包含4个文件，其中有分频器-ps2 interface experimental procedures, including the four documents, including divider
Encrypt_Decrypt(DES)_Verilog
- Encrypt and decrypt DES algorithm in verilog
FHSSTX
- Frequency Hopping Spread spectrum...Transmitter section
SPI_controller
- SPI serial flash ROM的verilog源代码, 针对winbond W25x16,已经经过逻辑验证,并实际用在芯片设计中,作为一个模块,正常工作.-SPI serial flash ROM in verilog source code for winbond W25x16, logic has been verified, and actually used in chip design, as a module to work.
color_space-converters-RGByuv
- 本文件包含了颜色空间转换的程序，用VERILOG编写的，经过仿真检验，确实是可行的一个程序-This document contains a color space conversion process, using VERILOG prepared, through simulation testing, a procedure is indeed feasible
5-15
- DDS的实现，在XILINX的FPGA验证通过。使用ROM实现的。-DDS implementations, in XILINX FPGA verification by. Using ROM.
kcpsm3
- Picoblaze core toplevel
AXI slave
- AXI slave 完整 verilog代码。测试验证通过。
adder215
- 有关于加法器的vhdl编程，是用赛灵思的fpga实现的，可以在赛灵思网站上找到更具体的说明-Adder on the vhdl program is the use of the Xilinx fpga achieve. Xilinx website can be found on more specific details of their