资源列表
ccd_vga_de2
- 基于DE2板的VGA，CCD视频采集代码，可以手动调整曝光量，可以拍照和即时摄像-DE2 board VGA CCD video capture code, you can manually adjust the exposure, can take pictures and instant camera
vga_automove_img
- VGA输出的图像，可以使图片在屏幕上自动碰撞移动。硬件语言-The VGA output image, the picture on the screen automatic collision mobile. Hardware language
verilogvga
- 个人课程设计，基于verilog语言的VGA显示打乒乓游戏-Personal curriculum design, based on the verilog languages VGA display to play table tennis game
verilogvga
- 基础的VGA显示代码，VERILOG语言编写-Based VGA display code, Verilog language
DE2_70_TV
- NTSC视频经过处理转化VGA，不需要进行编程，只需要把硬件电路接好即可-NTSC CONVERTS INTO VGA
small-signal-amplifier
- 高频小信号放大器，放大倍数为20~100，带宽一兆，误差小于5 ，附有实验报告-High-frequency small-signal amplifier, the magnification of 20 to 100, the bandwidth of a trillion, the error is less than 5 , with experimental reports
cmi
- 运用4阶m序列产生信号源 即消息码 用verilog编程实现cmi的产生-The use of fourth-order m-sequence generator source message code Verilog programming cmi generation
A3P40_ProASIC3
- ProASIC3, the third-generation family of Actel flash FPGAs, offers performance, density, and features beyond those of the ProASICPLUS® family. Nonvolatile flash technology gives ProASIC3 devices the advantage of being a secure, low-power, sing
rav2011
- 双向视频通讯，用于对讲系统，可以轻松用于其他应用-double video
10-COUNT
- 实验2设计资料10计数 Quartus 开发平台 压缩包内含有全部工程文件及详细资料说明-Experiment 2 design data 10 counts the Quartus development platform Compressed packet contains all engineering documents and detailed information on the
clock
- 实验3设计资料简易时钟 FPGA数字时钟设计参考资料及全部代码-Experimental design simple clock FPGA digital clock design reference information and all the code
prbs
- 伪二进制随机码的产生，在fpga上已经验证-Pseudo-random binary code generation