资源列表
ALU
- 8-bit unsigned, 16 operations(arithmetic and logic).
Shifter
- Modified 4-bit SISO shift register. Reset value 1101.
RISC-CPU
- 精简指令集 CPU 通过仿真验证正确 (使用之前务必看readme文件，和结构图!) 1. 此cpu是夏宇闻 verilog数字系统设计教程中最后一章的例程。 2. 学习时务必先搞明白框图原理，和数据流动！！！ 3. 牢记主状态机中一条指令周期中传输的16bit=3bit指令+13bit地址。 4. 理解数据总线，和地址总线。区分数据和地址。 5. 仔细调试，因为书中有很多小错误。 程序经过quartusii编译通过，另外经过modelsim仿真正确。-RISC
LED_RUN
- 8位跑马灯 verilog代码设计----基于QUATUS II 开发环境，使用与verilog代码入门学员-8 bit Verilog code design---- QUATUS II-based development environment, using Verilog code entry students
chaoqianadd6
- 用VHDL设计的超前六位加法器，实现六位二进制数的加法操作。-Adder VHDL design ahead of six, six binary addition operation.
chufa
- 用VHDL设计的四位除法器，可以实现四位二进制数的除法操作-Four divider with VHDL design, you can achieve the four binary division operation
johnson
- johnson计数一个比较高级的跑马灯可以控制灯的方向-Johnson count is a more advanced Marquee can control the direction of the light
open_free_list_latest.tar
- Its a code for authentication to a memory related topic of the ddr series in the line to achive desired output
sys_rst
- 一个pll和系统复位系统,通用的都可以用-A PLL and system reset, general can be used
dram_latest.tar
- Its a code for authentication to a memory related topic of the ddr series in the line to achive desired output
vhdl_7-show
- vhdl中对板子上led的控制，完成7段显示的基本功能，是初学者可以参考的一段代码-vhdl control board led, beginners can refer to a piece of code to complete the basic functions of the 7-segment display,
verilog-pll
- 用verilog写的倍频电路 文件中介绍DP-The multiplier circuit file by verilog introduced DPLL