资源列表
iir
- 基于FPGA的IIR滤波器实现，运行周期短，占用资源多，-IIR filter FPGA-based implementation, operation cycle is short, take more resources,
graduate
- 基于fpga的IIR和FIR滤波器实现，里面有DA和AD模块，已经下载到板子上验证。-IIR and FIR filter fpga-based implementation, which has DA and AD modules have been downloaded to authenticate to the board.
fpgaai2c
- 包含I2C协议说明及运用verilog实现读写I2C器件功能-IT contains I2C protocol instructions and use verilog to achieve functional literacy I2C devices
dsp320vc33_20020210.tar
- dsp 320 in vhdl.code for sram also included.
usb3300_20081015.tar
- usb sourcecode in vhdl along with document explaining it.test bench also added.
zr36060.tar
- vhdlsource code for jpegpack
6.An-FPGA-Based-High-Speed-IEEE-754-Double-Precis
- An FPGA Based High Speed IEEE-754 Double Precision Floating Point Multiplier
TFT
- FPGA EP1C6Q208C8实验。使用FPGA直接控制TFT彩屏，达到显示RGB。有仿真波形。-FPGA EP1C6Q208C8 experiment. Use the FPGA control to display TFT screen, RGB. A simulation waveform.
traffic-light-vhdl-Quartus-II6.0
- 简单的交通灯vhdl程序 Quartus II6.0下的程序 包含图形仿真-easy traffic light vhdl Quartus II6.0
fifo
- 同步fifo和异步fifo程序，含时钟同步。运用格雷码-Synchronous FIFO and asynchronous FIFO FIFO procedures, including clock synchronization. Application of gray code
exp1_CountWithMemory
- 用Altera—DE2板实现秒表的功能，该秒表具有一个复位按钮，两个暂停按钮和两个记录按钮。-Stopwatch function using Altera-DE2 board, the stopwatch has a reset button, two buttons and two recording pause button.
response_time
- 在fpga开发板上实现一个测试人的反映速度的功能，当灯亮时，按下按键，灯灭，然后数码管显示灯从亮到灭的时间，也就是人的反应时间-In fpga development board to implement a test reflect the speed of people' s function, when lights, press the button, the lamp is off, then the digital display lights from bright to o