资源列表
Frequency-meter-VHDL
- 频率计程序设计与仿真。本文为DOC文档，附有源码和仿真波形，详见文档-Frequency meter program design and simulation, this paper for the DOC document, attached to the source code and simulation waveform
PSK-modulation-VHDL
- PSK调制与解调VHDL程序及仿真，本文为DOC文档，附有源码和仿真波形-PSK modulation and demodulation VHDL program and simulation, this paper for the DOC document, attached to the source code and simulation waveform
URAT-VHDL
- URAT VHDL程序与仿真，本文为DOC文档，附有源码和仿真波形-URAT VHDL program and simulation, this paper for the DOC document, attached to the source code and simulation waveform
rms_cal
- 基于VHDL的有效值求取，内含低通滤波子模块-RAM CAL with LPF by VDHL
bresenham-algorithm
- Bresenham algorithm code, on verilog language using a Spartan 3
FA
- 使用VERILOG實現全加器的設計,並附上TB供測試-Use VERILOG achieve full adder design, together with a test for TB
timer
- 使用VERILOG實現時鐘,並附上TB供測試-Use VERILOG realize the clock, along with tests for TB
mux
- 使用VERILOG實現多工器之設計,並附上tb供測試-VERILOG realized using multiplexer design, along with tb for testing
pipeline
- 使用VERILOG實現MIPS2000的PIPELINE-Use VERILOG realized MIPS2000 the PIPELINE
CX40_Code
- 某公司的驱动TFT LCD的测试代码,使用VHDL，ISE环境-A company' s drive TFT LCD test code
ise_book
- VHDL学习资料，大量example可供参考学习，应用。-VHDL study
Arithmetic_blok
- Fast arithmetic bloc.