资源列表
cmd_state
- vhdl的三态门的实现！双向的输入输出！-vhdl doors of the tri-state to achieve! Two-way input and output!
honggongneng
- 是用quartus的调用宏功能！方便快捷-vhdl doors of the tri-state to achieve! Two-way input and output!
fangdouchengxu
- 是vhdl的防抖程序，十分简单，调用快捷！-Anti-shake is the vhdl procedure is very simple, quick call!
shift
- 用VHDL实现一个移位寄存器，是初学者需要掌握的一个简单的程序写法-Using VHDL realization of a shift register is available for beginners need a simple program written
szmiaobiao
- 应用VHDL语言设计数字系统，很多设计工作可以在计算机上完成，从而缩短了系统的开发时间，提高了工作效率。本文介绍一种以FPGA为核心，以VHDL为开发工具的数字秒表，并给出源程序和仿真结果。 -Application of VHDL language design digital systems, a lot of design work can be completed on the computer, thereby reducing system development time a
paobiao
- 一个用verilog编的时钟程序A clock with the procedures for verilog-A clock with verilog program for A clock with the procedures for verilog
keyboardverilog
- 键盘扫描verilog,键盘输入的扫描，用verylog语言编写-keyboard verylog
jtd
- 本实验要完成任务就是设计一个简单的交通灯控制器，交通灯显示用实验箱的交通灯模块和七段码管中的任意两个来显示。系统时钟选择时钟模块的1KHz 时钟，黄灯闪烁时钟要求为2Hz，七段码管的时间显示为1Hz 脉冲，即每1s 中递减一次，在显示时间小于3 秒的时候，通车方向的黄灯以2Hz的频率闪烁。系统中用S1 按键进行复位。-To complete the tasks in this experiment is to design a simple traffic light controller, t
EPM240
- 一些vhdl例子，希望大家喜欢，初学者还请多指教。-Some examples of vhdl I hope you like
soc-gr0040-010309
- xsoc vhdl verilog risc cpu soc implementation in very liitle cpld or fpga
lariviere2008uclinux
- xsoc vhdl verilog risc cpu soc implementation in very liitle cpld or fpga
Flashcontrollerxilinx
- Single power supply operation — Full voltage range: 2.7 to 3.6 volt read, erase, and program operations — Separate VCCQ for 5 volt I/O tolerance n Automated Program and Erase — Page program: 512 + 16 bytes — Block erase: 8 K + 256 bytes