资源列表
LCD12864jibenxianshichenggong
- fpga驱动lcd12864文字显示基本成功-fpga Niuguidongpu ﹍cd12864 Wenxiaoquandie ч Shao Bao Ji с Tuokun ╃ Ebanpanyi
3weishuru8weishuchuyimaqi
- fpga基本操作程序3位输入8位输出译码器-Bao Kun ╃ fpga Ebanmuyou Tongtizipin
Altera_Audio
- 针对Altera的DE2/ DE1交互板的音频核心的音频编解码器（编码器/解码器），并提供了音频输入和输出的接口。-The Audio Core interacts with the Audio CODEC (enCOder/DECoder) on the Altera DE2/DE1 Boards and provides an interface for audio input and output.
led
- 控制4盏灯从左到右依次点亮循环，这是基于系统驱动的开发，可用于嵌入式系统的学习-Control 4 lamps were lit left to right cycle
uart
- 这是用键盘控制led灯的点亮和熄灭，还可以控制蜂鸣器的响，可用于嵌入式的学习和开发-This is controlled by the keyboard led lights on and off, you can also control the buzzer sound can be used for embedded learning and development
b_to_bcd
- 8位的二进制码转bcd码，可以在数码管上直接显示数字。-BCD to 8-bit binary code, can directly on the digital tube display digital.
VHDL-8bitFIFO
- FIFO的宽度：也就是英文资料里常看到的THE WIDTH，它只的是FIFO一次读写操作的数据位，就像MCU有8位和16位，ARM 32位等等，本程序实现8位的FIFO功能,三位格雷码可表示8位的深度。-THE WIDTH of THE FIFO: namely information in English often see THE WIDTH, it is only a FIFO data read and write operations, as has 8 bit or 16 bit M
shuzizhong
- 基于CPLD的智能数字时钟VHDL设计，能实现时钟、秒表、闹钟、定时等功能-ntelligent digital clock CPLD VHDL-based design enables the clock, stopwatch, alarm clock, timer, and other functions
led
- 利用quartusii软件编程平台实现led点阵的汉字滚动显示功能，模拟广告牌-Quartusii use software programming platform led dot matrix character scrolling display, analog billboard
HUAWEI-Verilog
- 华为公司的Verilog HDL典型电路设计指导，仅供公司内部使用，内含全部源码，有很大的硬件设计指导意义。-Huawei s Verilog HDL typical circuit design guidance for internal company use, containing all the source code, there are a lot of hardware design guide
rom
- vhdl veri log rom file
AdcInterfaces
- A VHDL Code For ADC Interfaces