资源列表
e2prom_rd
- 该verilog代码用于E2PROM操作运用，用于I2C时序操作，存储数据-Operation is applied, the verilog code used in the E2PROM chips was introduced for I2C timing operation and store data
hex7segb
- Implimentation of the switches and 7 segment display bit counter on an Altera DE2 baord via VHDL code on the Cyclone II FPGA
Lab10Part3
- Quarturs 环境Verilog文档。用于显示英文字符在7位标准LED显示板。不可以直接使用哦，记得更改对应的module名字。-Quarturs environment Verilog documents. English characters display panel for displaying the seven standard LED. Oh, can not be used directly, remember to change the name of the corres
vga
- 用Verilog HDL写的VGA代码，实验板上验证过。-VGA with Verilog HDL code written, breadboard verified.
flash
- 用Verilog写的FLASH测试程序。先向FLASH里面写数据，然后再将数据读出来做比较。-Written using Verilog FLASH test program. Xianxiang FLASH write data inside, and then read out the data for comparison.
IIR
- 用Verilog实现一个IIR滤波器，并在ISE里面仿真。-Achieve an IIR filter with Verilog and simulation in ISE inside.
SDRAM
- 用Verilog写的SDRAM测试程序。先向SDRAM里面写数据，然后再将数据读出来做比较。-Written using Verilog SDRAM test program. Xianxiang SDRAM write data inside, and then read out the data for comparison.
advconfig
- 在Xilinx Zynq开发板上，通过IIC进行ADV芯片的配置。-In the Xilinx Zynq development board, ADV chip through the IIC configuration.
DULE-RAM
- 基于VERILOG的双口ram例子，比较简单，不是很复杂，入门了解就可以了。-Based on dual port ram VERILOG example, the relatively simple, not very complicated, entry understand it.
project
- 南京地铁，根据始站和终站，自动计算票价。-Nanjing subway station， based on the beginning and the end station, automatic calculation of fares.
clock18div
- Clock Divider, divfactor of 18
Digital_Filter_FPGA
- Digital Filter in VHDL