资源列表
txd_interface
- 串口发送接口控制联合uart_txd_contrl实现-uart TXD Verilog
txd_control
- uart串口发送控制模块 适合于485 422 232等接口-uart TXD——contrl Verilog
rxd_control
- 串口接收控制模块联合uart——rxd_interface使用-uart rxd contrl Verilog
baud_control
- uart串口波特率控制，和uart——top uart——rxd_contrl 等随模块联合使用-uart baud clk Verilog
DE0-PWM-Led-Drive---simulation
- DE0_PWM_LED_DRİ VE_Sİ MULATİ ON
key_led
- verilog hdl按键控制灯代码 用按键控制哪个led来亮灭功能-Button control lights Codes
PPE
- 开方，求倒数，开方的倒数三种快速运算。采用流水线结构，latency为23周期。-this unit can realize three functions,that is sqart,reciprocal and reciprocal of sqart. adopt fast algorithm and pipeline architecture. the latency is 23 clock cycles.
example1
- systemc code for adder
jisuan
- 4*4键盘输入实现加减乘的计算器，数电实验大作业，下到FPGA实验正确。-4* 4 keyboard input to achieve modified by the calculator, the large number of electrical test operations, right down to the FPGA experiment.
lena
- lena v1.0开发板的源代码，实现了对lena FPGA开发板各个部件的调用，直接在此源码上修改即可实现不同的功能-lena v1.0 development board source code, a call to the various components lena FPGA development board, in this modified source code directly to different functions
trafficlight
- VHDL实现红绿灯，multisim测试通过，可直接烧录到FPGA板上进行测试,带testbench-VHDL realize traffic lights, multisim tested, can be burned directly to the FPGA board for testing, with testbench
Manchester
- 曼彻斯特总线信号编码解码的VHDL程序应用于通讯技术-Manchester bus encoder and decoder