资源列表
sram_controleur_top
- Sram controller with 6 commande ports
2
- BCD码七段译码器CC4511,用VHDL语言来描述CC4511。-BCD code seven-segment decoder CC4511, using VHDL language to describe the CC4511.
8259
- 这是一个中断控制器的IP，功能很全，可以直接使用，类似于INTEL的8259，作为中断扩展。
sim_uart
- uart 收发器 verilog 代码，实现自收发功能 sys clk = 25m, baud 9600 停止位1， 无校验位； 代码实现了串口自收发功能，及把从 PC 收到的内容都发送会 PC, 其他波特率，自行修改代码即可，在 alter 的FPGA 上调试通过； -verilog code uart transceiver to achieve self-transceiver function sys clk = 25m, baud 9600 1 stop bit, no par
FIR-lv-bo-code
- 此代码为FIR滤波器的设计源码，并对其代码做了相应的改进，综合仿真结果成功-This code source code for the FIR filter design, and the code does a corresponding improvement, integrated simulation results successfully
LPM 个人整理了一些quartus II 中常用的宏模块
- 个人整理了一些quartus II 中常用的宏模块，里面有他们的功能介绍，希望对大家有用。-Individuals compiled some commonly used macros quartus II module, which have their functional descr iption, want to be useful.
Common_multiplier_verilog_design
- 上传文件为：常用乘法器verilog设计.rar-Upload files as follows: common multiplier verilog design. Rar
regs
- 3. Distribution of this core must be free of charge. Charging is -- allowed only for value added services. Value added services -- would include copying fees, modifications, customizations, and -- inclusion in other products.
ssram_Controler
- DE2-70开发板上的SSRAM的读取数据控制器，通过拨码可以实现读取数据。-DE2-70 development board SSRAM read data controller, through DIP can read data.
files-(2)
- Bit operations including Addition,subtraction,multiplication
119128662CORDIC_ATAN
- cordic算法实现ATAN函数 FPGA实现-ATAN function cordic algorithm FPGA Implementation
Vector_Matrix_Multiplier
- VHDL Vector Matrix Multiplier