资源列表
sp
- vhdl code to change bits stream from serial to parallel
uart
- vhdl code that s used to programming uart
PowerForwardUG
- low power user guide for NCverilog-low power user guide for Incisive ncsim, describe the Common Power Format uasge
FPGA-DigSigProcssing
- 數位信號處理的FPGA實現 這是一本FPGA的經典書籍-FPGA digital signal processing FPGA to achieve this is a classic book
6-ways-CPLD-to-replace-mcu
- 採用CPLD來替代微處理器的6種方法 這是很有用的costdown方案-CPLD to replace the microprocessor with 6 way this program is useful costdown
ALUvhdlcoding
- it is the simple ALU VHDL program. it is used to design the high level computer system.
serial-mul
- it is a 8*8 bit wallace tree structure multiplier.
Viterbi_verilog
- 在ISE环境下用Verilog语言编写的卷积码程序及Viterbi译码程序-Under the ISE Verilog language with procedures and Viterbi convolutional code decoding program
cpu
- 构造RISC_CPU各个部分的源码，以及验证的pro文件-Construction RISC_CPU various parts of the source code, and verify the pro file
VHDL-lecture
- VHDL语言实验教程，以及QuartusII教程-Experimental Course VHDL, and QuartusII Tutorial
MULTIPLIER
- A TWO BYTE MULTIPLIER SYNTHESIABLE
cookbook
- 用于verilog入门的小程序，包括各种crc,compare等常用硬件电路的描述-verilog cookbook，including several verilog code of crc，compare circuit etc.