资源列表
UART
- UART (universal asynchronous receiver transmitter protocol) working verilog
CAN_CODE
- CAN CODE in verilog complete
FIR_chanbing
- FIR滤波器的verilog HDL语言编写的，希望对大家有用-FIR filter verilog HDL languages, we hope to be useful
FIR_chanbing
- 串并结构的FIR滤波器,Verilog语言编写，希望对大家有帮助-String and the structure of FIR filter, Verilog language, we want to help
lpm_mux0
- 数据选择器 6选一，功能强大，用于数字中等六位选一位的器件-Data Selector
FPGA_ziliao
- 初学FPGA很好的资料，包括数码管、跑马灯、蜂鸣器等完整的工程-FPGA good beginner information, including digital control, marquees, such as the complete works buzzer
uvo_role
- 用户角色模型的函数，模仿window，版本为PB-A function of user role model, imitation window, version PB
tms320c6713
- tms320c6713 datasheet TI
actel-questions-and-answers
- actel常见问题集锦及解决方案，比较全面-actel common questions and answers
gray_unitary
- 图像数据压缩，用于对视频流的数据动态跟踪范围-video data compress
EDAshejijianggao2008
- EDA设计是演讲稿有关数字钟 ，结合实验箱-EDA design is a speech about digital clock, combined with experimental box
Altera_2C35F672_FFT_Verilog.RAR
- Altera芯片2C35F672实现FFT_Verilog代码。-Altera chip 2C35F672 achieve FFT_Verilog code.