资源列表
FPGA8051IP
- 详细介绍了使用FPGA是实现8051IP核设计的流程和结果-Details the use of FPGA design is to achieve 8051IP nuclear processes and results
VHDL
- 时钟发生器用于生成不同的时钟信号clock、clk2、fetch与alu_clk，产生的时钟信号clk送往寄存器与状态控制器，时钟信号clk2送往数据控制器与状态控制器，信号fetch送往数据控制器与地址多路器，信号alu_clk送往算术逻辑单元。-Clock generator to generate different clock signals clock, clk2, fetch and alu_clk, generated clock signal sent to register w
Altera
- “Altera杯”第五届全国研究生电子设计竞赛样板-" Altera Cup" of the Fifth National Graduate Electronic Design Competition model
LZY
- 基于FPGA的软FIFO代码实现，双时钟，异步。VERILOG-FPGA-based soft FIFO code, two clocks, asynchronous. VERILOG
aplicacion2
- contro keybord ps2 vhdl
fpga-based-experiment
- fpga实验在多种情况下 用途广泛 这里有许多常用的实验 基础 简单 易上手-fpga test widely used in many cases, there are many common experimental basis for a simple approachable
Verilog-versions-of-four-models-show
- fpga驱动vga四种样本 用途广泛 这里有许多常用的实验 基础 -Four samples of fpga driver vga There are many widely used common experimental basis
The-image-digital-SOPC
- 数字水印的图像在SOPC的实施 用fpga实现的功能 -The image digital watermarking implementation of the SOPC functions implemented with fpga
Commonly-used--source
- 常用算法程序集（C％％乙乙介绍）来源 用fpga实现-Commonly used algorithm assembly (C B B descr iption) sources to achieve with fpga
osh
- fpga驱动 常用 程序 用途 基本实验 验证性-fpga driver used the basic experimental procedures for confirmatory purposes
code-
- 消抖代码 应用于fpga 基础实验 常用-Debounce code commonly used in basic experimental fpga
rdresult
- fpga 基础实验 代码 常用 附有quartus电路图 -fpga code commonly used in basic experimental schematic