资源列表
pxa_27x_dev_man
- SOC ARM AMBA AHB-Lite 多层总线设计 PX310-P310 platform
altera_avalon_sdram_slave
- Altera avalon sdram controller salve.
8255_VHDL_source
- 基于quartusII的8255设计方案，采用硬件描述语言VHDL描述，很好的实现了8255通用接口芯片的设计-a project about 8255 chip based on quartusII,discr ipted by vhdl
CaudaldeRedesATM
- Optimizing ATM Nets by Genetic Algorithms
TRDB_LCM
- DE1/DE2的TRDB_LCM驱动Verilog源代码。-DE1/DE2 of TRDB_LCM drive Verilog source code.
8051vhdl_ip_core
- 8051完整ip内核Vhdl源代码程序。-8051 ip core Vhdl complete source code program
sdram_hr_hw
- SDRAM 读写控制检测Verilog源代码程序。-SDRAM read and write Verilog source code control testing procedures.
Descrierea_comenzilor
- Translation of the datasheet of the UC1610 GLCD controller
ALAW_LINEAR_CONVERTER
- This a HDL implementation of G711 A-LAW codec. It converts LINEAR to ALAW and vice versa. -This is a HDL implementation of G711 A-LAW codec. It converts LINEAR to ALAW and vice versa.
MLAW_LINEAR_CONVERTER
- This a HDL implementation of G711 MLAW to LINEAR and vice versa converter. Uses very less resources. -This is a HDL implementation of G711 MLAW to LINEAR and vice versa converter. Uses very less resources.
AD1674
- This is an interface in HDL for the AD1674 ADC converter.
clock
- 用Verilog语言实现一个时分秒及时的时钟-Verilog language with a time clock when the minute and second