资源列表
Azhar_fg
- Video information collection and processing
memory_testbench_systemverilog
- memory_testbench using systemverilog
da
- 用FPGA实现DA功能，同时控制液晶显示波形。-FPGA Implementation with DA function, while controlling liquid crystal display waveforms.
cpldkeyboard
- cpld利用学习机键盘输入数据，并在数码管显示出来，而且数码管显示位置可以选择-cpld use of learning machine keyboard input data and displayed in the digital control and digital display location option
test
- 从文件中读取波形文件的testbench例子，大家可以参考-Read from the file testbench waveform file example, we can refer to
TIMER
- 这个为倒计时时钟显示控制实验例子程序，大家可以参考-The countdown clock shows control experiments for the example program, we can refer to
3_8_DISPLAY
- vhdl实现3－8译码器，并通过7段数码管显示程序-vhdl decoder to achieve 3-8, and by 7 segment LED display program
verilog
- 华为的VERILOG HDL语言的精简培训教程，是值得一看的好东东！-IT IS VERY GOOD FOR BEGINNING
ram_latest
- VHDL实现CISC模型微处理器设计（含有rom和ram）本程序实现的是输入10个数，输出最小负数-VHDL model to achieve CISC microprocessor design (with rom and ram) to achieve this procedure is the number of input 10 and output the smallest negative
KID_ROM
- VHDL实现的只带rom的CISC模型微处理器设计 实现的是输入10个数，输出最小负数-VHDL implementation of the model with only rom the CISC microprocessor designs Realize that the number of input 10 and output the smallest negative
Verilog-HDL
- VerilogHDL实践与应用系统设计随书代码-VerilogHDL practice and application of system design with the code book
135classic_example_of_Verilog_design
- Verilog的135个经典设计实例，由简到繁，由浅入深，值得收藏！-Verilog' s 135 classic design example, from simple to complex, Deep and worth collecting!