资源列表
pci_mini_latest.tar
- pci的代码，有利于关于PCI核的使用，帮助更多的人去学习-pci
music
- 音乐播放，可播放音乐，义勇军进行曲，程序简单明了，适合初学verilog的新手使用，欢迎大家下载并给予意见和建议！-play music
16点快速傅立叶变换 16位数据输入输出
- 16点快速傅立叶变换 16位数据输入输出-16:00 Fast Fourier Transform 16 input and output data
div_any_nodd
- 使用verilog硬件语言实现任意奇数分频，使用ise11.1和modelsim仿真测试-Verilog language using any odd hardware divide, and the modelsim simulation testing using ise11.1
vga_fangkuaiyidong
- 能实现利用按键控制一个红色方块在屏幕上显示，程序思路清晰明了，易学习。-To achieve the use of a red button control box on the screen, the program thinking clarity, easy to learn.
miaobiao
- 秒表 数码管显示 采用verilog语言编写 Quartus II 9.0sp2 编译成功后生成的所有文件已包含-Digital display with stopwatch verilog language Quartus II 9.0sp2 successfully compiled all the files have been generated that contains
Modelsim_chinese
- 介绍Modelsim的一个很好的中文教程，初学者可以通过它简单的了解其基本操作等相关知识-Modelsim introduced a very good English course, beginners can learn through its simple operation of the basic knowledge
UART_FIFO
- Verilog 语言描述，基于FIFO设计的UART。Quartus 10中编译通过-Verilog language descr iption, based on the design of the UART FIFO
Adder-Designs-using-Reversible-Logic-Gates
- REVERSIBLE LOGIC BASED ADDERS DOCUMENTATION
i2s interface
- i2s interface VHDL language FPGA. Using for MEMS microfone
clock
- 在Quartus II环境下开发了一个多功能数字时钟，是一个完整的工程，包含仿真和编程下载文件。-In Quartus II environment developed a multi-function digital clock, is a complete project, including the simulation and programming download files.
elimination_competitionaadventure
- 数字逻辑设计中，竞争冒险的消除方法及对应代码~为Quartus环境下开发~-The elimination of competition and adventure