资源列表
VHDL6
- 一个VHDL的交通灯程序，让你明白如何使用VHDL语言进行交通灯的设计-A VHDL program of traffic lights to let you know how to use the VHDL language design of traffic lights
DCM_24M_20M_2M
- DCM实现24M 20M 2Mhz的输出-dcm、 verlig HDL、
pruebacont
- Param Counter Verilog
div_clk
- 主时钟为15.36MHz的带选通的8位输出分频器，可得到100Hz,120Hz,1kHz,10kHz的频率-Master clock for the 15.36MHz band strobe output 8-bit prescaler, can be 100Hz, 120Hz, 1kHz, 10kHz frequency
transfer
- 实现UART的发送功能，采用了状态机来描述其功能。-Achieve UART transmit function, using the state machine to describe its function.
cordic-verilog
- 用Verilog写的cordic相位鉴别，采用8级的流水线的硬件设计-Written using Verilog cordic phase identification, using 8-level hardware design of the pipeline
keyboard
- verilog FPGA开发板4*4键盘代码，正确可实现-4*4keyboard diven by verilog
shejilegeshangxiazidongkongzhi
- Verilog 的设计的程序。反复看了很久，电梯设计很是实用性强的一个程序，现在分享给大家，很多实验室做设计的时候需要，希望可以用到-The Verilog design program. Repeatedly looked for a long time, elevator design is very practical program for everyone now share many laboratory design needs can be used
hello_uart
- Uart接口测试程序，Xilinx参考设计，ML507硬件测试通过.--Uart interface test code，Xilinx reference design，tested on ML507 platform.
R61526-initial-code
- initial code to set up the R61526 LCD controler
account
- Verilog 实现的电话计费器 信号定义：decide： 电话局反馈回来的信号，代表话务种类，“01”表示市话，“10”表示长话，“11”表示特话；-Verilog-based telephone billing device
9999jishu
- VHDL语言编程，7段共阴数码管显示（四个数码管） 其中使用的是进程语句，使用MAX+puls编程。-VHDL language programming, a total of 7 negative digital display (four digits) which is used in the process of language, the use of MAX+ puls programming.