资源列表
fallthrough_small_fifo_v2
- 同步fifo设计，仿真已通过，用Verilog编写，代码短小-Synchronous fifo design, simulation has been adopted, written with Verilog, code short
example
- 这是一种基于FPGA的空调控制器的设计 基于多种基本的功能-This is a FPGA-based controller design is based on a variety of air-conditioning function of the basic
P2S_TOP
- This file contains the Parallel to Serial conversion. This is the top module where we can change the code. The other part of this file is Parallel to Serial controller i,e P2S_SM
ADC
- ADC instruction for HC08 Target
traffic-light
- 实现双向交通灯控制的Verilog HDL代码-Verilog HDL code to control bi-direction traffic light
COMMAND232_SEND
- 这个代码用VHDL编写，是RS232在UART协议层发送数据的实现过程，很有用的！-The VHDL code is written, is the RS232 UART protocol layer in the implementation process of sending data, very useful!
uart_tx
- UART EDGE TRIGGERED ONE SHOT VHDL
4bit_counter_clk_div
- 4 bit counter with clock division to 1 sec nearly.
sleep_wake-up
- SLEEP WAKE UP FOR CSR CPU
multi4_bsdu
- 用VHDL写的4*4乘法器，学习VHDL语言的可以-Use VHDL to write the 4* 4 multiplier, learning VHDL language can be
GCM应用下的ghash核
- GCM应用下的ghash硬件实现的源代码，方法是多项式法，时钟可达到280Mhz，用verilog编写.