资源列表
8051core-Verilog
- 基于FPGA的8051MCU的设计与实现-FPGA-Based Design and Implementation of 8051MCU
scan2
- 数码管扫描显示，两位数码管显示，当扫描频率高时就是静态显示。-Digital the tube scan display, two digital tube display is a static display, high scanning frequency.
8051_verilog
- 8051 IP, 使用veriog实现，在Altera9.0环境下编译通过-8051 IP in verilog, which is verified in Altera9.0 environmen.
VHDL-zhengtongbutiqu
- 基于VHDL帧同步提取建模与设计 该设计主要是在一帧数据的前后插入巴克码-Based on VHDL frame synchronization extraction modeling and design
digital-frequency-meter
- 数字频率计的设计，1.频率测量范围：1Hz—9999Hz。 2.数字显示位数：4位数字显示。3.被测信号幅度Ui=0.5—5V（正弦波、三角波、方波）。4.测量时间：t≤1.5S-The design of digital frequency meter, 1. Frequency Range: 1Hz-9999Hz. 2. Digital Display digits: 4-digit display. 3. The measured signal amplitude Ui = 0.5-5
VHDL作业－张晓峰036099149
- VHDL的四选一选择器-VHDL four elected a selector
water_led_design
- 基于FPGA的流水灯，附带整个原工程及程序。-Water lamp based on FPGA, with the original project and program.
xuliejiancejisuanqikongzhiqi
- VHDL序列检测器，计算器，控制器编码以及实现方法。-VHDL sequential detector, calculator, controller and its implementation method.
CAN_VHD.ZIP
- CAN VHDL Controller Area Network en languge VHDL CAN VHDL Opencore
VHDL_qicheweideng
- VHDL语言，汽车尾灯的设计 设计说明：共6个尾灯，汽车正常行驶时，6个灯全灭； 左转时，左边3个灯从右到左依次亮灭； 右转时，右边3个灯从左到右依次亮灭； 刹车时，车灯全亮；故障时，全部闪烁。 -VHDL language, the design of the design of the taillights Descr iption: six taillights, the normal running of the vehicle, six lights all off
WP8-Lund-VTC2004-05-05-2004-V1.0
- vhdl for fft and ofdm
FPGA_VGA
- 采用FPGA技术，使用少量资源，实现VGA各个控制信号。-Using FPGA technology, the use of a small amount of resources to achieve VGA various control signals.