资源列表
vga_controller
- vga controller (640x480) Spartan3E FPGA board
shuziplj
- 数字频率计，基于单片机和proteus仿真的，经过验证，程序电路都没问题，欢迎大家下载参考-Digital frequency meter based on SCM and Proteus, simulation, verification, program circuit does not have the question, welcome everyone to download the reference
8.8-URAT-VHDL
- URAT VHDL程序与仿真 URAT the VHDL program and Simulation-URAT the VHDL program and Simulation
fifo1
- 异步FIFO的设计 包括testbench 已调试成功-Asynchronous FIFO design includes testbench debug success has been
AsynFIFO
- Verilog 代码 异步FIFO，可综合，综合效率高，cumming的经典方法。-Verilog code for asynchronous FIFO, Cumming s the classic method.
External-frequency
- 名称：频率计 内容：T0外部计数，T1计时1S，计算1S内外部脉冲个数，并在液晶显示 频率：单位时间内完成振动的次数-Name: Frequency Counter content: T0 external count, T1 timing 1S, 1S calculate the number of internal and external pulse, and the liquid crystal display frequency: per unit time to
dsp320vc33_20020210.tar
- dsp 320 in vhdl.code for sram also included.
Chapter 4
- codes and simulation of chapter 4
Module基础全集
- 如题，各种veirlog 基础代码大全，虽功能不及ip核，但却可以学习到很多(For example, all kinds of veirlog base code, though not as functional as IP core, can learn a lot)
Mashayan
- rebuild file in check for
cy4ex1
- 特权同学FPGA开发板的verilog项目代码(the verilog code project of Tequan Altera cyclone4 FPGA development board)
ADC9481
- 利用FPGA对AD9481进行采样，亲测有用(Sampling ad9481 with FPGA)