资源列表
Crack_QII_10.1_Windows
- quartus 10.1破解文件 内部人员用-quartus 10.1 crack file with internal staff
fen1to7
- 这是我在ISP编程实验中独立编写的一个采用行为描述方式实现的分频器，通过两个并行进程对输入信号CLK进行8分频，占空比为1:7-This is my ISP programming experiment in the preparation of an independent descr iption of the use of behavior to achieve the prescaler, through two parallel processes on the input signa
PCI_VHDL
- pci控制器的vhdl代码-pci vhdl
exer2
- 给定一个频率为33MHz的时钟，试利用该时钟得到一个基本均匀的2.048MHz时钟-Given a frequency of 33MHz clock, try to use the clock to get a basic uniform of the 2.048MHz clock
IT51_src.tar
- 這是最新版本修正過後的8051,經過debug並有實現在某家公司的silicon上ㄛ-This is the latest version of the amendment after 8051, after debug and achieve a certain company's intention on silicon
taxi
- 出租车计价器VHDL程序 The Taximeter VHDL program-The Taximeter VHDL program
8bits_multiplier
- 8×8乘法器Verilog源代码，初学者可以试着-8×8multiplying unit source code
lpm_mul
- ８＊８的乘法器verilog源代码,经过编译仿真的，绝对真确，对初学者很有帮助-8 * 8 Multiplier verilog source code, compiled simulation, absolute authenticity, helpful for beginners
source
- FPGA中实现I2C接口的一个IP核，包含verilog及VHDL代码。方便迅速理解和开发I2C总线接口。-FPGA to implement an I2C interface IP core that contains verilog and VHDL code. Facilitate rapid understanding and development of I2C bus interface.
Traffic-lights
- 本实验是模拟控制一个十字路口的交通灯，横向路口控制灯为 row1 和 row3-Analog control of the experiment is a crossroads of traffic lights, landscape lights for junction control row1 and row3
FFT8
- 本设计根据OFDM系统的实际需要，提出一种用FPGA实现FFT运算的方案，并以64点FFT为例，在Quartus II软件上通过了综合和仿真。
example7
- 模拟控制一个十字路口的交通灯，横向路口控制灯为 row1 和 row3；纵向路口控制灯为 row2 和 row4。-Analog control a crossroads of traffic lights, lights for row1 lateral junctions and row3 vertical junctions lights for row2 and row4.