资源列表
bcd2
- 二位BCD码加法器 加数与被加数都是2进制。输出和为10进制。 结果显示在LED上。
vme_sv
- voice modulation engine, a DSP processor with test bench written in SystemVerilog
VHDLchuankou
- VHDL语言描述的串口程序 2400Hz的波特率时钟-VHDL language to describe the serial program
controlvhdl
- 一个四位微程序控制器的指令译码器源码，运用VHDL语言实现。-A four micro-program controller instruction decoder source code, the use of VHDL language.
wb_rtc
- // -*- Mode: Verilog -*- // Filename : wb_master.v // Descr iption : Wishbone Master Behavorial // Author : Winefred Washington // Created On : 2002 12 24 // Last Modified By: . // Last Modified On: . // Update Count : 0 // Status : U
division_imp4_v5
- Code VHDL for Newton Raphson BCD Division and Carry Save Multiplication in BCD
saolei
- 基于FPGA的扫雷游戏，9X9扫雷，我们的游戏包含有五个状态，分别欢迎界面，游戏胜利，简单游戏模式，自定义游戏模式，游戏失败模式。-FPGA-based minesweeper game, 9X9 mine, the game includes five of our state, respectively, the welcome screen, the game is victory, a simple game modes, custom game modes, game failure
cordiccos
- 改进的cordic算法的迭代cos结构，适用于altera。-Improved Iterative CORDIC algorithm cos structure, applicable to altera.
PPE
- 开方，求倒数，开方的倒数三种快速运算。采用流水线结构，latency为23周期。-this unit can realize three functions,that is sqart,reciprocal and reciprocal of sqart. adopt fast algorithm and pipeline architecture. the latency is 23 clock cycles.
altcam
- altcam远程控制存取，多种运算，全面
keilc-shiyan3
- 单处机实验程序，实现数据统计及排序实验 熟悉单片机的指令系统，了解程序设计基本方法1、 排序用冒泡排序算法-One experimental program at the machine, data statistics and sort familiar to microcontroller instruction experiment to understand the basic method of 1 programming, sorting using bubble sort al
EDApinlvji
- EDA频率计程序 EDA频率计程序-Frequency meter program EDA EDA EDA frequency meter frequency meter program procedures